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Subject:
Code: Level: |
Computer Organization and Architecture COE 608 B.Eng. 3rd Year |
| Electrical, Computer and Biomedical Engineering |
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Subject:
Code: Level: |
Computer Organization and Architecture COE 608 B.Eng. 3rd Year |
| Electrical, Computer and Biomedical Engineering |
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Altera
FPGA Cyclone-IV Details Quartus-II
Handbook-v1 Lab-1: Quartus-II Tutorial and VHDL Example (2% Weight) DE2-115
board pin assignment file Lab-3 Part-1: 32-bit ALU Design and Simulation (3% Weight) Lab-3 Part-2: 8-bit ALU Design Implementation and Testing (3% Weight) Lab-4 Part-a: Data Memory Module (2% Weight) Lab-4 Part-b: CPU Data Path Design (4% Weight)
CPU
Specification for Lab-4, Lab-5 Lab-5: CPU Control Unit Design (6% Weight) |