Subject:
Code:
Level:
Computer Organization and Architecture
COE 608
B.Eng. 3rd Year

  Electrical, Computer and Biomedical Engineering

COE 608: Computer Organization and Architecture
 

  Home

  Announcements

  Course Outline

  Lecture Notes

  Labs

  Problem Sets

  Exams

  FAQs

 
 Laboratory Instructions/Manuals

  VHDL Tutorial
  DE2-115 board User Manual
  Altera FPGA Cyclone-IV Details      Quartus-II Handbook-v1
  Connecting to the EE Network
  Lab-1:a  Quartus-II Tutorial and VHDL Example (2% Weight)
Lab-1a:  DE2-115 board pin assignment file
  Lab-2:a  CPU Register Set Design (3% Weight)
  Lab-3a:  32-bit ALU Design and Simulation (3% Weight)
  Lab-3b:  8-bit ALU Design Implementation and Testing (3% Weight)
  Lab-4a:  Data Memory Module (2% Weight)
  Lab-4b:  CPU Data Path Design (4% Weight)
Lab-1a:  CPU Specification for Lab-4, Lab-5
Lab-1a:  Data Path Control
  Lab-5:a  CPU Control Unit Design (6% Weight)
  Lab-6:a  CPU Integration and Testing (7% Weight)
Lab-1a:  CPU Testing for Lab-6