COE318 Lab 7 output

Lab 7 output from SimulateClockedDLatch

Once you complete the circuit description (Nodes and Blocks), the output should be:

Handling event setting Node Clk to 1 at 0

Handling event setting Node SBar to 0 at 20

Handling event setting Node D to 0 at 24

Handling event setting Node DBar to 1 at 29

Handling event setting Node Q to 1 at 35

Handling event setting Node RBar to 0 at 39

Handling event setting Node SBar to 1 at 44

Handling event setting Node Q to 0 at 59

Handling event setting Node QBar to 0 at 60

Handling event setting Node QBar to 1 at 64

Handling event setting Node Q to 1 at 75

Handling event setting Node Q to 0 at 79

SIMULATION FINISHED

12 Events handled